Security protection on FPGA against differential power analysis attacks
暂无分享,去创建一个
[1] Christophe Clavier,et al. Correlation Power Analysis with a Leakage Model , 2004, CHES.
[2] Jianwei Chen,et al. SimWattch: Integrating Complete-System and User-Level Performance and Power Simulators , 2007, IEEE Micro.
[3] Trevor Mudge,et al. MiBench: A free, commercially representative embedded benchmark suite , 2001 .
[4] Amir Moradi,et al. Dual-rail transition logic: A logic style for counteracting power analysis attacks , 2009, Comput. Electr. Eng..
[5] Stefan Mangard,et al. Power analysis attacks - revealing the secrets of smart cards , 2007 .
[6] Xian-wei Gao,et al. Resistance DPA of RSA on Smartcard , 2009, 2009 Fifth International Conference on Information Assurance and Security.
[7] Jean-Sébastien Coron,et al. A New DPA Countermeasure Based on Permutation Tables , 2008, SCN.
[8] Louis Goubin,et al. DES and Differential Power Analysis (The "Duplication" Method) , 1999, CHES.
[9] Sylvain Guilley,et al. Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics , 2010, IEEE Transactions on Computers.
[10] Paul C. Kocher,et al. Differential Power Analysis , 1999, CRYPTO.
[11] Meikang Qiu,et al. Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems , 2009, TODE.
[12] Christophe Clavier,et al. Differential Power Analysis in the Presence of Hardware Countermeasures , 2000, CHES.