JSS FOCUS ISSUE ON ADVANCED INTERCONNECTS :M ATERIALS ,P ROCESSING, AND RELIABILITY Electrical Reliability Challenges of Advanced Low-k Dielectrics

We review the latest studies that address the fundamental understanding of low-k dielectric electrical properties and reliability. We focus on the results discussing the nature of process induced defects, leakage currents and breakdown behavior, as they are important factors to reveal material modification and damage. Issues related to the use of porogen based PECVD techniques during dielectric deposition are discussed, where we focus on the selection of matrix and porogen precursors and on the improvements related to post-deposition treatments. During damascene integration, low-k dielectrics are subjected to several processes that induce material damage, where we review recent learning about plasma exposure, barrier deposition and chemical mechanical polishing. In order to have a successful implementation of advanced ultralow-k films in back-end-of-line interconnects, we argue that more research efforts are needed with respect to its material development, integration and reliability and make some proposals for future work. © The Author(s) 2014. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any