For many decades the semiconductor industry has enjoyed the benefits of scaling. Every 2 years or so a new process node would arrive, bringing with it reduced area, along with improved performance and power. In recent years, we have seen and overcome many challenges to the scaling model, necessitating considerable efforts in VLSI circuits and technology. While we have largely maintained area scaling, obtaining even modest node-to-node improvements in performance and power has been difficult. New applications require much higher level compute than ever before which we are aiming to do via accelerators, programmable fabrics etc. These implementations respond very well with technology scaling. However, we are now approaching the biggest challenge yet. What happens when scaling slows to the point that it has, for practical purposes, stopped? How will we survive the post-scaling era? Our panel of experts, spanning VLSI technology, circuits, and business, looks at the difficulties ahead and potential ways forward.