Hierarchical simulation of electronic circuits. A theoretical framework
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Complex systems (e.g., VLSI circuits) call for hierarchical simulation in the context of a unified representation of design and verification. Different hierarchy types structure the knowledge representation (either declarative or procedural) as well as the simulator itself: abstraction levels, block decomposition, concept hierarchies, symbolization degree, meta-knowledge. Analog circuit design demands for systematic methodology in a medium compatible to digital circuit design. Object-orientation and knowledge-based architecture offer the framework to constructively formalize the different hierarchy types. Formalization of the hierarchical simulation is approached stepwise: syntax of description language (⇒ correct expression), syntax + semantics of description language (⇒ correct representation), syntax + semantics of simulation language (⇒ correct simulation).