A 167-processor 65 nm computational platform with per-processor dynamic supply voltage and dynamic clock frequency scaling
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T. Mohsenin | G. Landge | C. Watnik | Zhibin Xiao | Zhiyi Yu | B. Baas | Anh Tran | D. Truong | W. Cheng | T. Jacobson | M. Meeuwsen | P. Mejia | J. Webb | E. Work
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