Design and Microcontroller Implementation of a Three phase SCR Power converter

A single processor controls a three phase silicon controlled rectifier (SCR) power converter. An inexpensive, dual optoisolator interface to the power line provides noise rejection and an improved measure of the zero crossing. A dynamic digital phase-locked loop (PLL) algorithm implemented in an Intel 87C196KD-20 processor achieves frequency tracking, dynamically changing characteristics for improved performance. Dynamically modifying the PLL characteristics permits independent capture and locked dynamics. A feedforward method provides command tracking for improved response without loss of performance. This three-component design (processor, optoisolator, and SCR gate drivers) represents a minimal implementation with potential for closed loop voltage and current control. High speed input and output resources included on the 87C196KD processor make an efficient single-device implementation possible. The processor is less than 1% utilized allowing for additional functions to be added in the future. This system operates on both 50 Hz and 60 Hz power systems without modification or loss of performance.