28th ACM/IEEE DESIGN AUTOMATION CONFERENCE@

[1]  Hidetoshi Onodera,et al.  Branch-and-bound placement for building block layout , 1991, 28th ACM/IEEE Design Automation Conference.

[2]  Sung-Mo Kang,et al.  ILLIADS: a new fast MOS timing simulator using direct equation-solving approach , 1991, 28th ACM/IEEE Design Automation Conference.

[3]  Wayne Allen,et al.  The MCC CAD framework methodology management system , 1991, 28th ACM/IEEE Design Automation Conference.

[4]  Janusz Rajski,et al.  Generation of correlated random patterns for the complete testing of synthesized multi-level circuits , 1991, 28th ACM/IEEE Design Automation Conference.

[5]  Deborah C. Wang.  Novel routing schemes for IC layout part I: two-layer channel routing , 1991, 28th ACM/IEEE Design Automation Conference.

[6]  Steve Banks,et al.  A configuration management system in a data management framework , 1991, 28th ACM/IEEE Design Automation Conference.

[7]  Heinz Mattes,et al.  Propagation delay calculation for interconnection nets on printed circuit boards by reflected waves , 1991, 28th ACM/IEEE Design Automation Conference.

[8]  M. Ray Mercer,et al.  The interdependence between delay-optimization of synthesized networks and testing , 1991, 28th ACM/IEEE Design Automation Conference.

[9]  Reiji Toyoshima,et al.  Timing- and constraint-oriented placement for interconnected LSIs in mainframe design , 1991, 28th ACM/IEEE Design Automation Conference.

[10]  Silvano Gai,et al.  Creator: general and efficient multilevel concurrent fault simulation , 1991, 28th ACM/IEEE Design Automation Conference.

[11]  Edmund M. Clarke,et al.  Representing circuits more efficiently in symbolic model checking , 1991, 28th ACM/IEEE Design Automation Conference.

[12]  P. Senn,et al.  A constraint based approach to automatic design of analog cells , 1991, 28th ACM/IEEE Design Automation Conference.

[13]  Vishwani D. Agrawal,et al.  A transitive closure based algorithm for test generation , 1991, 28th ACM/IEEE Design Automation Conference.

[14]  Jürgen Koehl,et al.  An analytic net weighting approach for performance optimization in circuit placement , 1991, 28th ACM/IEEE Design Automation Conference.

[15]  Nagisa Ishiura,et al.  Probabilistic CTSS: analysis of timing error probability in asynchronous logic circuits , 1991, 28th ACM/IEEE Design Automation Conference.

[16]  Nam Sung Woo.  A heuristic method for FPGA technology mapping based on the edge visibility , 1991, 28th ACM/IEEE Design Automation Conference.

[17]  Min-Siang Lin,et al.  Channel density reduction by routing over the cells , 1991, DAC '91.

[18]  Krzysztof Kozminski,et al.  Benchmarks for layout synthesis - evolution and current status , 1991, 28th ACM/IEEE Design Automation Conference.