An algorithm for calculating the lower confidence bounds of CPU and CPL with application to low-drop-out linear regulators

Abstract In assessing the performance of normal stable manufacturing processes with one-sided specification limits, process capability indices C PU and C PL have been widely used to measure the process capability. The purpose of this paper is to develop an algorithm to compute the lower confidence bounds on C PU and C PL using the UMVUEs of C PU and C PL . The lower confidence bound presents a measure on the minimum capability of the process based on the sample data. We also provide tables for the engineers/practitioners to use in measuring their processes. A real-world example taken from a microelectronics device manufacturing process is investigated to illustrate the applicability of the algorithm. Implementation of the existing statistical theory for capability assessment fills the gap between the theoretical development and the in-plant applications.