Hybrid Phase Converter with Enhanced Efficiency and dc Fault Tolerant Capability for HVDC Application

The parallel hybrid modular multilevel converter (PHMMC) is gaining more popularity for HVDC applications due to lower losses and requirement of small sub-module (SM) capacitor. However, PHMMC suffers from fixed modulation index (MI), large dc side voltage ripples and inability to act against dc faults. A novel hybrid phase converter (HPC) topology is presented in this paper to eliminate the aforementioned limitations of PHMMC. The proposed HPC not only has wide MI range but is also tolerant to dc faults. The dc side voltage ripples of the HPC can be minimized by using the proposed modified control method, which excludes the requirement of dc inductor. A new control method is also proposed to maintain the SMs capacitor voltage. DC fault analysis is also carried out to substantiate the fault blocking capability of HPC. Component level models are developed in PSCAD to validate the working of the proposed HPC and its controller. SM capacitor size is determined analytically, which proves that the HPC requires lower capacitive energy storage per unit apparent power and consequently has lower footprint.