Compact Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method
暂无分享,去创建一个
[1] Shinobu Nagayama,et al. Compact representations of logic functions using heterogeneous MDDs , 2003, 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings..
[2] Florent de Dinechin,et al. Second Order Function Approximation Using a Single Multiplication on FPGAs , 2004, FPL.
[3] Shinobu Nagayama,et al. Programmable numerical function generators: architectures and synthesis method , 2005, International Conference on Field Programmable Logic and Applications, 2005..
[4] Jack E. Volder. The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..
[5] Tsutomu Sasao. A cascade realization of multiple-output function for reconfigurable hardware , 2001 .
[6] John H Mathews,et al. Numerical methods for computer science, engineering, and mathematics , 1986 .
[7] Shinobu Nagayama,et al. On the optimization of heterogeneous MDDs , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[8] Jie Cheng,et al. High-performance architectures for elementary function generation , 2001, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001.
[9] Nagayama Shinobu,et al. Programmable Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method , 2006 .
[10] Michael J. Schulte,et al. Approximating Elementary Functions with Symmetric Bipartite Tables , 1999, IEEE Trans. Computers.
[11] J.-M. Muller,et al. A new scheme for table-based evaluation of functions , 2002, Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002..
[12] Michael J. Schulte,et al. Symmetric bipartite tables for accurate function approximation , 1997, Proceedings 13th IEEE Sympsoium on Computer Arithmetic.
[13] Wayne Luk,et al. A Gaussian noise generator for hardware-based simulations , 2004, IEEE Transactions on Computers.
[14] Tsutomu Sasao,et al. Realization of multiple-output functions by reconfigurable cascades , 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.
[15] Ray Andraka,et al. A survey of CORDIC algorithms for FPGA based computers , 1998, FPGA '98.
[16] Jean-Michel Muller,et al. Elementary functions - algorithms and implementation (2. ed.) , 2006 .
[17] Tsutomu Sasao,et al. Application of LUT cascades to numerical function generators , 2004 .
[18] Michael J. Schulte,et al. The Symmetric Table Addition Method for Accurate Function Approximation , 1999, J. VLSI Signal Process..
[19] Wayne Luk,et al. Non-uniform Segmentation for Hardware Function Evaluation , 2003, FPL.
[20] Takashi Horiyama,et al. Minimization of fractional wordlength on fixed-point conversion for high-level synthesis , 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).
[21] Takashi Horiyama,et al. Minimization of fractional wordlength on fixed-point conversion for high-level synthesis , 2004 .
[22] Naofumi Takagi,et al. Function evaluation by table look-up and addition , 1995, Proceedings of the 12th Symposium on Computer Arithmetic.