Layout tools for analog ICs and mixed-signal SoCs: a survey

Layout for analog circuits has historically been a time consuming, manual, trial-and-error task. The problem is not so much the size (in terms of the number of active devices) of these designs, but rather the plethora of possible circuit and device interactions: from the chip substrate, from the devices and interconnects themselves, from the chip package. In this short survey we enumerate briefly the basic problems faced by those who need to do layout for analog and mixed-signal designs, and survey the evolution of the design tools and geometric/electrical optimization algorithms that have been directed at these problems.

[1]  Rob A. Rutenbar,et al.  Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization , 1995 .

[2]  Yasuhiro Kobayashi,et al.  LADIES: an automatic layout system for analog LSI's , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[3]  Andrew T. Yang,et al.  Mixed-signal switching noise analysis using Voronoi-tessellated substrate macromodels , 1995, DAC '95.

[4]  P.R. Gray,et al.  OPASYN: a compiler for CMOS operational amplifiers , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Rob A. Rutenbar,et al.  A methodology for rapid estimation of substrate-coupled switching noise , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

[6]  C. D. Gelatt,et al.  Optimization by Simulated Annealing , 1983, Science.

[7]  Massimo A. Sivilotti,et al.  A dynamically configurable architecture for prototyping analog circuits , 1988 .

[8]  Davide Pandini,et al.  Automatic generation of transistor stacks for CMOS analog layout , 1993, 1993 IEEE International Symposium on Circuits and Systems.

[9]  Alberto L. Sangiovanni-Vincentelli,et al.  Constraint-based channel routing for analog and mixed analog/digital circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[10]  J. D. Conway,et al.  An automatic layout generator for analog circuits , 1992, [1992] Proceedings The European Conference on Design Automation.

[11]  Mohamed I. Elmasry,et al.  STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  David D. Ling,et al.  Power Supply Noise Analysis Methodology For Deep-submicron Vlsi Chip Design , 1997, Proceedings of the 34th Design Automation Conference.

[13]  Alberto Sangiovanni-Vincentelli,et al.  A module generator for high-speed CMOS current output digital/analog converters , 1996 .

[14]  Alberto L. Sangiovanni-Vincentelli,et al.  Simultaneous Placement and Module Optimization of Analog IC's , 1994, 31st Design Automation Conference.

[15]  Rob A. Rutenbar,et al.  An O(n) algorithm for transistor stacking with performance constraints , 1996, DAC '96.

[16]  Rob A. Rutenbar,et al.  Automatic Generation of Parasitic Constraints for PerformanceConstrained Physical Design of Analog Circuits , 2002 .

[17]  Davide Pandini,et al.  Optimum CMOS stack generation with analog constraints , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Rob A. Rutenbar,et al.  Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs , 1996 .

[19]  Hidetoshi Onodera,et al.  Operational-amplifier compilation with performance optimization , 1990 .

[20]  Davide Pandini,et al.  Optimum stacked layout for analog CMOS ICs , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[21]  Alberto L. Sangiovanni-Vincentelli,et al.  Generalized constraint generation in the presence of non-deterministic parasitics , 1996, Proceedings of International Conference on Computer Aided Design.

[22]  Rob A. Rutenbar,et al.  ILAC: An Automated Layout Tool for Analog CMOS Circuits , 2002 .

[23]  D. J. Allstot,et al.  Rapid simulation of substrate coupling effects in mixed-mode ICs , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[24]  Alberto L. Sangiovanni-Vincentelli,et al.  Use of sensitivities and generalized substrate models in mixed-signal IC design , 1996, DAC '96.

[25]  Gerard F. M. Beenker,et al.  Analog CAD for Consumer ICs , 1993 .

[26]  Edoardo Charbon,et al.  Quick placement with geometric constraints , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[27]  Alberto L. Sangiovanni-Vincentelli,et al.  CADICS-cyclic analog-to-digital converter synthesis , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[28]  David J. Allstot,et al.  Simulation techniques and solutions for mixed-signal coupling in integrated circuits , 1994 .

[29]  Rob A. Rutenbar,et al.  KOAN/ANAGRAM II: new tools for device-level analog placement and routing , 1991 .

[30]  R. S. Gyurcsik,et al.  A generalized approach to routing mixing analog and digital signal nets in a channel , 1989 .

[31]  D. J. Allstot,et al.  Verification of RF and mixed-signal integrated circuits for substrate coupling effects , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[32]  H. W. Li,et al.  Analog layout using ALAS , 1996 .

[33]  P. Glenn Gulak,et al.  A Field-Programmable Mixed-Analog-Digital Array , 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

[34]  J. Trnka,et al.  A Device Level Auto Place And Wire Methodology For Analog And Digital Masterslices , 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

[35]  E.K.F. Lee,et al.  Field programmable analogue array based on mosfet transconductors , 1992 .

[36]  Georges G. E. Gielen,et al.  Direct Performance-Driven Placement of Mismatch-sensitive Analog Circuits , 1995, 32nd Design Automation Conference.

[37]  E. Charbon,et al.  SUBWAVE: a methodology for modeling digital substrate noise injection in mixed-signal ICs , 1996, Proceedings of Custom Integrated Circuits Conference.

[38]  Georges Gielen,et al.  Analog routing for manufacturability , 1996, Proceedings of Custom Integrated Circuits Conference.

[39]  E. Charbon,et al.  A performance-driven router for RF and microwave analog circuit design , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

[40]  Florin Balasa,et al.  Module placement for analog layout using the sequence-pair representation , 1999, DAC '99.

[41]  Maher Kayal,et al.  SALIM: a layout generation tool for analog ICs , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[42]  Alberto Sangiovanni-Vincentelli,et al.  Generalized constraint generation in the presence of non-deterministic parasitics , 1996, ICCAD 1996.

[43]  David J. Allstot,et al.  SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits , 1995, ICCAD.

[44]  Robert G. Meyer,et al.  Modeling and analysis of substrate coupling in integrated circuits , 1996 .

[45]  N. P. van der Meijs,et al.  Extraction of circuit models for substrate cross-talk , 1995, ICCAD.

[46]  David J. Allstot,et al.  Fast parasitic extraction for substrate coupling in mixed-signal ICs , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

[47]  Rob A. Rutenbar,et al.  Device-level early floorplanning algorithms for RF circuits , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[48]  Hans W. Klein.  Circuit development using EPAC technology: an analog FPGA , 1995, Optics East.

[49]  A. Sangiovanni-Vincentelli,et al.  Use of performance sensitivities in routing analog circuits , 1990, IEEE International Symposium on Circuits and Systems.

[50]  R.K. Henderson,et al.  A spreadsheet interface for analog design knowledge capture and re-use , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[51]  Alberto L. Sangiovanni-Vincentelli,et al.  Area routing for analog layout , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[52]  Andrew T. Yang,et al.  Stable and efficient reduction of substrate model networks using congruence transforms , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[53]  Yoji Kajitani,et al.  VLSI module placement based on rectangle-packing by the sequence-pair , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[54]  José Luis Huertas,et al.  An algorithm for the place-and-route problem in the layout of analog circuits , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[55]  Rob A. Rutenbar,et al.  Substrate-aware mixed-signal macrocell placement in WRIGHT , 1995 .

[56]  Lawrence T. Pileggi,et al.  Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[57]  Pierre Marchal,et al.  Field-programmable gate arrays , 1999, CACM.

[58]  Rob A. Rutenbar,et al.  Latchup-aware placement and parasitic-bounded routing of custom analog cells , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[59]  Maher Kayal,et al.  A new routing method for full custom analog ICs , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[60]  E. Charbon,et al.  A Constraint-driven Placement Methodology For Analog Integrated Circuits , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[61]  Ian Macbeth,et al.  Design and Implementation of a Field Programmable Analogue Array , 1996, Fourth International ACM Symposium on Field-Programmable Gate Arrays.

[62]  Alberto L. Sangiovanni-Vincentelli,et al.  A video driver system designed using a top-down, constraint-driven methodology , 1996, Proceedings of International Conference on Computer Aided Design.

[63]  Ronald S. Gyurcsik,et al.  Sensitivity-driven placement of analog modules , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[64]  Rob A. Rutenbar.  Analog design automation: Where are we? Where are we going? , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[65]  David J. Allstot,et al.  SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[66]  E. Charbon,et al.  A Top-down, Constraint-driven Design Methodology For Analog Integrated Circuits , 1996, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[67]  Alberto L. Sangiovanni-Vincentelli,et al.  Automatic generation of parasitic constraints for performance-constrained physical design of analog circuits , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[68]  Donatella Sciuto,et al.  Analog circuits placement: a constraint driven methodology , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[69]  Hidetoshi Onodera,et al.  An efficient algorithm for layout compaction problem with symmetry constraints , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[70]  Ken Martin,et al.  BALLISTIC: an analog layout language , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

[71]  Rob A. Rutenbar,et al.  Automatic layout of custom analog cells in ANAGRAM , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[72]  E. Charbon,et al.  Imposing tight specifications on analog IC's through simultaneous placement and module optimization , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[73]  Rob A. Rutenbar,et al.  Power distribution synthesis for analog and mixed-signal ASICs in RAIL , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[74]  Rob A. Rutenbar,et al.  System-level routing of mixed-signal ASICs in WREN , 1992, ICCAD.

[75]  L.R. Carley,et al.  Techniques for simultaneous placement and routing of custom analog cells in KOAN/ANAGRAM II , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[76]  Rob A. Rutenbar,et al.  New algorithms for placement and routing of custom analog cells in ACACIA , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[77]  John M. Cohn.  Analog Device-Level Layout Automation , 1994 .

[78]  Donatella Sciuto,et al.  Constraint generation and placement for automatic layout design of analog integrated circuits , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[79]  Maher Kayal,et al.  LAYIN: toward a global solution for parasitic coupling modeling and visualization , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[80]  Shoichi Masui,et al.  Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits , 1993 .

[81]  Alberto L. Sangiovanni-Vincentelli,et al.  A routing methodology for analog integrated circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[82]  E. Charbon,et al.  Performance-driven compaction for analog integrated circuits , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[83]  Leon O. Chua,et al.  Field-programmable analog arrays , 1998 .

[84]  Wen Wang,et al.  Chip Substrate Resistance Modeling Technique for Integrated Circuit Design , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[85]  Alberto L. Sangiovanni-Vincentelli,et al.  Symbolic compaction with analogue constraints , 1995, Int. J. Circuit Theory Appl..

[86]  E.K.F. Lee,et al.  A transconductor-based field-programmable analog array , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

[87]  S. W. Mehranfar.  STAT: a schematic to artwork translator for custom analog cells , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[88]  Rob A. Rutenbar,et al.  Substrate-aware mixed-signal macro-cell placement in WRIGHT , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[89]  Rob A. Rutenbar,et al.  Synthesis tools for mixed-signal ICs: progress on frontend and backend strategies , 1996, DAC '96.

[90]  Ernest S. Kuh,et al.  Glitter: A Gridless Variable-Width Channel Router , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[91]  Rob A. Rutenbar,et al.  System-level routing of mixed-signal ASICs in WREN , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

[92]  Alberto L. Sangiovanni-Vincentelli,et al.  Semi-analytical techniques for substrate characterization in the design of mixed-signal ICs , 1996, Proceedings of International Conference on Computer Aided Design.

[93]  David J. Allstot,et al.  Verification techniques for substrate coupling and their application to mixed-signal IC design , 1996 .

[94]  Rob A. Rutenbar,et al.  Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis , 1994, IEEE J. Solid State Circuits.

[95]  J.-F. Zurcher.  Micros 3 - A CAD/CAM Program for Fast Realization of Microstrip Masks , 1985, 1985 IEEE MTT-S International Microwave Symposium Digest.

[96]  Alberto L. Sangiovanni-Vincentelli,et al.  Automation of IC layout with analog constraints , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[97]  Alberto L. Sangiovanni-Vincentelli,et al.  Constraint generation for routing analog circuits , 1991, DAC '90.

[98]  Georges Gielen,et al.  A performance-driven placement tool for analog integrated circuits , 1995 .

[99]  Alberto L. Sangiovanni-Vincentelli,et al.  Generalized constraint generation for analog circuit design , 1993, ICCAD.

[100]  E. Berkcan,et al.  Analog compilation based on successive decompositions , 1988, DAC '88.

[101]  Colin Lyden,et al.  A CMOS continuous-time field programmable analog array , 1997, FPGA '97.

[102]  Rob A. Rutenbar,et al.  Mixed-signal noise-decoupling via simultaneous power distribution design and cell customization in RAIL , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[103]  Y. Therasse,et al.  A Switched-capacitor Filter Compiler , 1987 .

[104]  R. H. Jansen,et al.  A comprehensive CAD approach to the design of MMICs up to mm-wave frequencies , 1988 .