Soft Connections: Addressing the Hardware-Design
暂无分享,去创建一个
[1] Christoforos E. Kozyrakis,et al. RAMP: Research Accelerator for Multiple Processors , 2007, IEEE Micro.
[2] Arvind,et al. A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs , 2008, FPGA '08.
[3] Dam Sunwoo,et al. FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators , 2007, MICRO.
[4] Babak Falsafi,et al. A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs , 2008, FPGA '08.
[5] Arvind,et al. Quick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs , 2008, ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and software.
[6] Arvind,et al. Modular scheduling of guarded atomic actions , 2004, Proceedings. 41st Design Automation Conference, 2004..
[7] Dam Sunwoo,et al. The FAST methodology for high-speed SoC/computer simulation , 2007, ICCAD 2007.