70-nm impact-ionization metal-oxide-semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs)

70-nm I-MOS devices have been integrated with 70-nm TFETs for the first time by adopting a novel process method. The integration of the I-MOS device with the TFET is meaningful in that it compensates for weak points of each device and implements both high-performance and low-power functionality on the same substrate. Additionally, by using SOI substrate and modifying mask layout, ON/OFF current ratio of the I-MOS device is increased dramatically by a factor of more than 1000 compared with our previous works. Finally, we have investigated the applicability of the I-MOS device to inverter and 6T-SRAM cell by measurement and mixed-mode simulation. When applied to 6T-SRAM cell, CI-MOS case shows 22.6 % improvement in SNM without much penalty in cell area

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