Design of the critical controller in physical coding sublayer based on the 10Gbase-KR protocol

The 10Gbase-KR protocol is widely used to accomplish the high speed data conversion in the Ethernet area. This paper presents a design of the critical controller in the physical coding sublayer based on the 10Gbase-KR. In order to satisfy the demand of the high speed data conversion, the scrambler and descrambler are specially designed to work in a parallel mode. The post-synthesis simulation results demonstrate that the adapted parallel scrambler and descrambler work well in the whole PCS system with the MAC and PMA sublayer.