Multi-level cell memory device using high rate code

A multi-level cell memory device using high rate code is provided to minimize overhead of encoding and decoding as increasing the number of bits stored in one multi-level cell, by writing data in the multi-level cell memory through encoding of high code rate. A multi-level cell memory device storing data includes a groups of m-bit MLC(Multi-Level Cell) memory cells(261,262,263,264) where a and m are an integer above 2, an encoder(210) and a signal mapping part(220). The encoder generates encoded bit stream by encoding k bit data with code rate of k/n. The signal mapping part writes the encoded bit stream in the groups of m-bit MLC memory cells by applying a pulse according to the encoded bit stream to the group of m-bit MLC memory cells.