论文信息 - ESD protection design with adjustable snapback behavior for 5-V application in 100nm CMOS process

ESD protection design with adjustable snapback behavior for 5-V application in 100nm CMOS process

An N-channel electrostatic discharge (ESD) protection device with DNW sinker has been designed without latch-up risk for 5-V operating condition. With the DNW sinker, the NMOS snapback behavior can be restrained and the holding voltage can be increased. The proposed ESD protection device can sustain 3.6kV human-body-model (HBM) and 325V machine model (MM) ESD tests. With holding voltage of 6.4V, the latch-up test shows the immunity from 7.5V voltage test and 200-mA current test.

Tien-Hao Tang | Kuan-Cheng Su | Yu-Chun Chen | Chang-Tzu Wang

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