Analysis of conducted-EMI noise influence on the effectiveness of an EDAC technique to mitigate soft errors in ionizing radiation environment

This work describes preliminary experiments that analyze the influence of conducted electromagnetic interference (EMI) noise on the effectiveness of an error detection and correction (EDAC) technique. This technique was originally conceived to mitigate multiple-bit upsets (MBUs) or soft errors in memory elements (flip-flops and SRAM cells) of integrated circuits (ICs) operating in heavy ions environment. The analysis was performed on a Microsemi ProASIC3E A3PE1500 FPGA, which was operating in an 8MV Pelletron heavy-ion accelerator while exposed to conducted EMI noise on IC input power port. Injected noise comprised of voltage dips of 19.6% of VDD at the frequency of 5kHz and was performed according to the IEC 61000-4-29 standard. The obtained results suggest that the proposed technique is very effective to detect and correct multiple bit flips induced by the combined effects of ionizing radiation and conducted EMI on the tested IC input power port.