Elimination of Dynamic Hazards by Factoring
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[1] Hugo De Man,et al. A generalized state assignment theory for transformations on signal transition graphs , 1994, J. VLSI Signal Process..
[2] Douglas B. Armstrong,et al. Design of Asynchronous Circuits Assuming Unbounded Gate Delays , 1969, IEEE Transactions on Computers.
[3] Jon G. Bredeson. On Multiple Input Change Hazard-Free Combinatorial Switching Circuits without Feedback , 1973, SWAT.
[4] Tadao Murata,et al. Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.
[5] Robert K. Brayton,et al. Specification, synthesis, and verification of hazard-free asynchronous circuits , 1994, J. VLSI Signal Process..
[6] G. Goossens,et al. A generalized state assignment theory for transformations on signal transition graphs , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.
[7] Tam-Anh Chu,et al. Synthesis of self-timed VLSI circuits from graph-theoretic specifications , 1987 .
[8] Michel Hack,et al. ANALYSIS OF PRODUCTION SCHEMATA BY PETRI NETS , 1972 .
[9] Paul T. Hulina,et al. Elimination of Static and Dynamic Hazards for Multiple Input Changes in Combinatorial Switching Circuits , 1972, Inf. Control..
[10] Robert K. Brayton,et al. Synthesis of hazard-free asynchronous circuits from graphical specifications , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[11] Cho Woo Moon. Synthesis and verification of asynchronous circuits from graphical specifications , 1992 .
[12] David L. Dill,et al. Exact two-level minimization of hazard-free logic with multiple-input changes , 1992, ICCAD.
[13] David L. Dill,et al. Exact two-level minimization of hazard-free logic with multiple-input changes , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..