Quality factor optimisation of spiral inductor using firefly algorithm and its application in amplifier

This proposal details an optimised design of a CMOS spiral inductor for output matching circuit of low noise amplifier by employing nature inspired intelligence-based technique called firefly optimisation algorithm (FA). Optimisation of these parameters has been carried out by considering single objective function. Penalty factor method is considered for handling the constraints. Using FA technique, the inductor with a high quality factor of 5.87 is obtained at 5.5 GHz frequency in Matlab environment. A computer-aided design tool ASITIC is used for the validation. The output matching circuit of low noise amplifier is designed using pi model obtained from ASITIC. The designed LNA has a cascode structure with inductive source degeneration topology and is implemented in UMC 0.18 µm CMOS technology using CADENCE software. The designed LNA has a simulated value at 5.5 GHz frequency.