Optimized designs of low loss non-blocking optical router for ONoC applications

Recently, optical network on chip (ONoC) has attracted the attention of researchers as a promising technology for low power and high bandwidth on chip communication. ONoC improves the computational efficiency of multi-core processors and chips. However, their performance suffers from power losses and limited scalability. In this paper, we present two innovative designs of five port non-blocking ONoC routers constructed by using micro-ring resonators and waveguides for low power losses and the optimum number of components. We compared the performance of the designed routers with previously reported optical routers for the power insertion loss and the requirement of micro-ring resonators. The result shows that proposed optical routers have the lowest power losses and require a lower number of micro-ring resonators. First proposed router has 1.3% lower average loss and 9.8% lower maximum port to port loss as compared to Cygnus router. The second proposed router has 4.8% lower average loss than Cygnus router. The results also show that the performance of both the routers is far better than the crossbar router. The second proposed router requires only fifteen micro-ring resonators, that is 6% lower than Cygnus router.

[1]  John Shalf,et al.  Optical Interconnects and Extreme Computing , 2016 .

[2]  David A. B. Miller,et al.  Device Requirements for Optical Interconnects to Silicon Chips , 2009, Proceedings of the IEEE.

[3]  Jiang Xu,et al.  Five-Port Optical Router Based on Microring Switches for Photonic Networks-on-Chip , 2013, IEEE Photonics Technology Letters.

[4]  D. Van Thourhout,et al.  Highly Integrated Optical 4 $\,\times\,$4 Crossbar in Silicon-on-Insulator Technology , 2009, Journal of Lightwave Technology.

[5]  Sebastian Werner,et al.  A Survey on Optical Network-on-Chip Architectures , 2017, ACM Comput. Surv..

[6]  Raymond G. Beausoleil,et al.  Nanoelectronic and Nanophotonic Interconnect , 2008, Proceedings of the IEEE.

[7]  K. Bernstein,et al.  Scaling, power, and the future of CMOS , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[8]  Yingtao Jiang,et al.  A Generic Optical Router Design for Photonic Network-on-Chips , 2012, Journal of Lightwave Technology.

[9]  Hui Chen,et al.  Cascaded Microresonator-Based Matrix Switch for Silicon On-Chip Optical Interconnection , 2009, Proceedings of the IEEE.

[10]  Kayhan M. Imre.  Dual-mode routing approach for photonic network on chip platforms , 2016, The Journal of Supercomputing.

[11]  Lei Guo,et al.  Low Insertion Loss and Non-Blocking Microring-Based Optical Router for 3D Optical Network-on-Chip , 2018, IEEE Photonics Journal.

[12]  Fang Xu,et al.  Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip , 2008, SPIE OPTO.

[13]  Luca P. Carloni,et al.  Photonic NoC for DMA Communications in Chip Multiprocessors , 2007 .

[14]  Hong Guo,et al.  High-Speed Implementation of Length-Compatible Privacy Amplification in Continuous-Variable Quantum Key Distribution , 2018, IEEE Photonics Journal.

[15]  Weihua Xu,et al.  Performance Optimization and Evaluation for Torus-Based Optical Networks-on-Chip , 2015, Journal of Lightwave Technology.

[16]  Ahmad Khademzadeh,et al.  A routing algorithm for reducing optical loss in photonic Networks-on-Chip , 2017, Photonic Network Communications.

[17]  S. Xiao,et al.  Multiple-channel silicon micro-resonator based filters for WDM applications. , 2007, Optics express.

[18]  Zheng Wang,et al.  ODOR: a microresonator-based high-performance low-cost router for optical networks-on-Chip , 2008, CODES+ISSS '08.

[19]  Lin Yang,et al.  Five-port optical router for photonic networks-on-chip. , 2011, Optics express.

[20]  Qinfen Hao,et al.  A low-cost strictly non-blocking micro-ring based 4×4 on-chip optical router , 2016, 2016 IEEE Optical Interconnects Conference (OI).

[21]  Hao Jia,et al.  Integrated five-port non-blocking optical router based on mode-selective property , 2018 .

[22]  P. Dumon,et al.  Silicon microring resonators , 2012 .

[23]  Jiang Xu,et al.  Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks , 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[24]  Wei Zhang,et al.  A Low-power Low-cost Optical Router for Optical Networks-on-Chip in Multiprocessor Systems-on-Chip , 2009, 2009 IEEE Computer Society Annual Symposium on VLSI.