An Efficient Layout Design of Fredkin Gate in Quantum-dot Cellular Automata (QCA)

Quantum-dot Cellular Automata (QCA) has been considered one of the alternative technologies used in Nanoscale logic design and a promising replacement for conventional Complementary Metal Oxide Semiconductor (CMOS) due to express speed, ultralow power consumption, higher scale integration and higher switching frequency. Since reversible logic circuits are one of the significant components of any digital system, especially Fredkin gate played an important role in designing a high speed and ultralow power consuming digital system. In this paper, an efficient design of Fredkin gate based on QCA logic gates: the QCA wire, majority gate and QCA inverter gate has been presented. Furthermore, compared with the previous design, the number of cells, covered area and latency time of the proposed design have reduced by 62.20%, 76.70%, and 25% respectively and also obviate coplanar wire-crossing. Functional correctness of the presented layout has proved by employing QCADesigner tool. The proposed circuit is a promising constructing in low power consuming fault-tolerance system and can stimulate higher degree of integrated applications in QCA. Keywords: Quantum-dot Cellular Automata (QCA), QCA logic gates, Fredkin gate and QCADesigner

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