Non-linear methods for overlay control

Overlay requirements for DRAM devices are decreasing faster than anticipated. With current methods overlay becomes ever harder to control and therefore novel techniques are needed. This paper will present an alignment based method to address this issue. The use and impact of several non-linear alignment models will be presented. Issues here include the number of alignment marks to use and how to distribute them over the wafer in order to minimize the throughput impact while at the same time providing maximum wafer coverage. Integrating this method into a R2R environment strongly depends on the stability of the process. Advantages and disadvantages of the method will be presented as well as experimental results. Finally some comments will be given on the need and feasibility of wafer by wafer corrections.