The 3D tri-gate transistors are a remarkable break through in the realm of CMOS technology. These transistors can be considered as a reinvention of t he transistor, in a way that they have supplanted t he conventional "flat" 2D planar gate with an incredibly thin 3D si licon fin that rises up vertically from the silicon substrate. Such tri-gate transistors have shown significantly impro ved electrostatics in terms of sub-threshold slope and drain induced barrier lowering and hencebetter more scala bility than planar transistors. This next-generatio n technology, which target ultra high-performance systems for mil itary, wire line communications, cloud networking, and compute and storage applications, will enable breakthrough levels of performance and power efficiencies not ot herwise possible. These tri-gate transistors in concert wit h other key semiconductor technologies will enable a new era of energy-efficient performance. This Paper discusses the 3-D Tri-Gate transistor technology, its develop ments and integration with other silicon processing technolog ies, and its impact on the next generation FPGAs ba sed on it.
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