Set-up reduction in PCB automated assembly

Abstract An heuristic approach to reduce set-up time in printed circuit board assembly is given. A single insertion/ placement machine is considered, and set-up time is taken as directly proportional to the number of component replacements. The problem is formulated as an IP model, for which a heuristic method is developed. The method includes two algorithms: sequence and mix. The algorithms are implemented in LISP, and an extensive series of experiments is performed and their results are presented.