Securing Software Architectures for Trusted Processor Environments
暂无分享,去创建一个
[1] Robert H. Sloan,et al. Examining Smart-Card Security under the Threat of Power Analysis Attacks , 2002, IEEE Trans. Computers.
[2] Jean-Jacques Quisquater. The adolescence of smart cards , 1997, Future Gener. Comput. Syst..
[3] Bernhard Kauer. OSLO: Improving the Security of Trusted Computing , 2007, USENIX Security Symposium.
[4] Srinivas Devadas,et al. The Trusted Execution Module: Commodity General-Purpose Trusted Computing , 2008, CARDIS.
[5] Ralph C. Merkle,et al. A Certified Digital Signature , 1989, CRYPTO.
[6] Niels Provos,et al. Encrypting Virtual Memory , 2000, USENIX Security Symposium.
[7] Jean-Raymond Abrial,et al. Modeling in event-b - system and software engineering by Jean-Raymond Abrial , 2010, SOEN.
[8] Adrian Perrig,et al. TrustVisor: Efficient TCB Reduction and Attestation , 2010, 2010 IEEE Symposium on Security and Privacy.
[9] Xavier Leroy,et al. Bytecode verification on Java smart cards , 2002 .
[10] Sebastian Mödersheim,et al. The AVISPA Tool for the Automated Validation of Internet Security Protocols and Applications , 2005, CAV.
[11] Michael K. Reiter,et al. Flicker: an execution infrastructure for tcb minimization , 2008, Eurosys '08.
[12] Michael Norrish,et al. seL4: formal verification of an OS kernel , 2009, SOSP '09.
[13] Sean W. Smith,et al. Building a high-performance, programmable secure coprocessor , 1999, Comput. Networks.
[14] Sean W. Smith,et al. Building the IBM 4758 Secure Coprocessor , 2001, Computer.
[15] Srinivas Devadas,et al. Silicon physical random functions , 2002, CCS '02.
[16] N. Asokan,et al. Towards User-Friendly Credential Transfer on Open Credential Platforms , 2011, ACNS.
[17] G. Edward Suh,et al. AEGIS: architecture for tamper-evident and tamper-resistant processing , 2003 .
[18] Jerome H. Saltzer,et al. The protection of information in computer systems , 1975, Proc. IEEE.
[19] Geoffrey Strongin. Trusted computing using AMD "Pacifica" and "Presidio" secure virtual machine technology , 2005, Inf. Secur. Tech. Rep..
[20] Manuel Blum,et al. Checking the correctness of memories , 2005, Algorithmica.
[21] Z. Chen. Java Card Technology for Smart Cards: Architecture and Programmer''s Guide. The Java Series. Addis , 2000 .
[22] Trent Jaeger,et al. Design and Implementation of a TCG-based Integrity Measurement Architecture , 2004, USENIX Security Symposium.
[23] Damien Deville,et al. Smart Card operating systems: Past Present and Future , 2003 .
[24] Mohammad Iftekhar Husain,et al. LASE: Latency Aware Simple Encryption for Embedded Systems Security , 2009 .
[25] Peng Ning,et al. SICE: a hardware-level strongly isolated computing environment for x86 multi-core platforms , 2011, CCS '11.
[26] Hovav Shacham,et al. When good instructions go bad: generalizing return-oriented programming to RISC , 2008, CCS.
[27] Jochen Liedtke,et al. Toward real microkernels , 1996, CACM.
[28] G. Edward Suh,et al. Aegis: A Single-Chip Secure Processor , 2007, IEEE Design & Test of Computers.
[29] Moni Naor,et al. How Efficient Can Memory Checking Be? , 2009, TCC.
[30] Michael Norrish,et al. seL4: formal verification of an operating-system kernel , 2010, Commun. ACM.
[31] Marten van Dijk,et al. Efficient memory integrity verification and encryption for secure processors , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..
[32] Jean-Pierre Seifert,et al. A trusted mobile phone reference architecturevia secure kernel , 2007, STC '07.
[33] Jochen Liedtke,et al. Improving IPC by kernel design , 1994, SOSP '93.
[34] Chris I. Dalton,et al. LaLa: a late launch application , 2009, STC '09.
[35] G. Edward Suh,et al. Caches and hash trees for efficient memory integrity verification , 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..
[36] Burton H. Bloom,et al. Space/time trade-offs in hash coding with allowable errors , 1970, CACM.
[37] Nael B. Abu-Ghazaleh,et al. TPM-SIM: A framework for performance evaluation of Trusted Platform Modules , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).
[38] Butler W. Lampson,et al. A note on the confinement problem , 1973, CACM.
[39] G. Edward Suh,et al. Physical Unclonable Functions for Device Authentication and Secret Key Generation , 2007, 2007 44th ACM/IEEE Design Automation Conference.
[40] David Grawrock. Dynamics of a trusted platform: a building block approach , 2009 .
[41] Danny Dolev,et al. On the security of public key protocols , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).
[42] Markus G. Kuhn,et al. Tamper resistance: a cautionary note , 1996 .
[43] E. Belhaire,et al. A non-volatile flip-flop in magnetic FPGA chip , 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..
[44] Johannes Winter,et al. Towards customizable, application specific mobile trusted modules , 2010, STC '10.
[45] S.K. Iyer,et al. Electrically programmable fuse (eFUSE) using electromigration in silicides , 2002, IEEE Electron Device Letters.
[46] Udo Steinberg,et al. NOVA: a microhypervisor-based secure virtualization architecture , 2010, EuroSys '10.
[47] Adrian Perrig,et al. SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes , 2007, SOSP.
[48] C. H. Fancher. In your pocket: smartcards , 1997 .
[49] Jan-Erik Ekberg,et al. Tapping and Tripping with NFC , 2013, TRUST.
[50] Paul England,et al. Towards a Programmable TPM , 2009, TRUST.
[51] Thai Son Hoang,et al. Rodin: an open toolset for modelling and reasoning in Event-B , 2010, International Journal on Software Tools for Technology Transfer.
[52] Josef Langer,et al. NFC Devices: Security and Privacy , 2008, 2008 Third International Conference on Availability, Reliability and Security.
[53] N. Asokan,et al. A Platform for OnBoard Credentials , 2008, Financial Cryptography.
[54] Bart Preneel,et al. Embedded Trusted Computing with Authenticated Non-volatile Memory , 2008, TRUST.
[55] Ruby B. Lee,et al. Covert and Side Channels Due to Processor Architecture , 2006, 2006 22nd Annual Computer Security Applications Conference (ACSAC'06).
[56] Lionel Torres,et al. Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines , 2009, Trans. Comput. Sci..
[57] Flavio D. Garcia,et al. A Practical Attack on the MIFARE Classic , 2008, CARDIS.
[58] Tao Zhang,et al. Hardware assisted control flow obfuscation for embedded processors , 2004, CASES '04.
[59] Maurice V. Wilkes,et al. The Cambridge CAP computer and its operating system (Operating and programming systems series) , 1979 .
[60] Paul Benoit,et al. Météor: A Successful Application of B in a Large Project , 1999, World Congress on Formal Methods.