Performance Analysis of Packet Switches with Input and Output Buffers

Abstract We develop an analytical model of a nonblocking packet switch with input and output queues that is able to transfer up to L packets per slot to a given switch output. It is modeled as a finite input and output queueing system with 1 L ⩽ N , where switch size N is finite. We investigate the effect of parameters L , N , traffic load P and input/output buffer size on the packet loss performance. We solve the model by using the matrix method that is better suited for numerical computation to handle a realistic range of several parameters considered. In addition, we analyze an input and output queueing system with adaptive input control for the nonblocking packet switch. With numerical results of this study, we show that the input and output queueing switch having a minimal value of L (e.g., L = 2) can easily be realized, keeping the packet loss performance at an acceptable level. We also show that with the adaptive control scheme one can prevent the performance degradation of the switch with L = 2 under imbalanced traffic conditions, and can minimize the size of buffers required at output ports so that it is approximately the same as that at input ports.