Topic 8 Parallel Computer Architecture and Instruction-Level Parallelism

Parallel computer architecture and instruction-level parallelism are hot topics at Euro-Par conferences, since these techniques are present in most contemporary computing systems. At Euro-Par 2003, 18 papers were submitted to the topic, from which 1 distinguished, 4 regular and 4 short papers were accepted. The scope of this topic includes but is not limited to parallel computer architectures, processor architecture (architecture and micro architecture as well as compilation), the impact of emerging microprocessor architectures on parallel computer architectures, innovative memory designs to hide and reduce the excess latency, multi-threading, and impact of emerging applications on parallel computer architecture design.