An approach for designing digital CMOS layered self-timed interfaces is presented. Each layered interface consists of a region containing m optimizable transmitter-receiver pairs such that transmission channel i is characterized by the three-vector attribute x/sub i/=(R/sub o,/ C/sub g,/ 1). A layer is sized by minimizing a hybrid cost function subject to one or more constraint functions selected from a menu. This approach specifically treats two-cycle bundled data protocols but can be generalized to other asynchronous signaling schemes as well as synchronous data transmission. The design paradigm is illustrated by solving a nonlinear constrained optimization problem which adequately accounts for the effect of wire inductance on signal delay. The approach achieves appreciable speedup in the overall design task.<<ETX>>
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