The activity of a microprocessor system can be altered by random failures due to dynamic hardware faults or unforeseen software errors that cannot be detected by common automatic test (ATE) or built-in self-test (BIST) offline systems. The authors describe a method for the detection of a particular class of such faults. This method is based on a monitoring strategy that surveys online the correctness of the program flow in an actual microprocessor system. It is determined whether the microprocessor program counter is correctly updated by following one of the allowable paths of the program flow. In program flow, two situations can be considered: sequential flow and deviation form sequentiality. It is possible to subdivide the program into segments in which the instructions are sequentially executed. Such segments are linked to each other by those instructions that cause the deviation from sequentiality. Examples of linking between program segments are given, and the logical structure for the main control activity of the implemented checking system is described.<<ETX>>
[1]
Stephen S. Yau,et al.
An Approach to Concurrent Control Flow Checking
,
1980,
IEEE Transactions on Software Engineering.
[2]
Y. Crouzet,et al.
A 6800 coprocessor for error detection in microcomputers: The PAD
,
1986,
Proceedings of the IEEE.
[3]
Edward J. McCluskey,et al.
Concurrent Error Detection Using Watchdog Processors - A Survey
,
1988,
IEEE Trans. Computers.
[4]
Edward J. McCluskey,et al.
Concurrent System-Level Error Detection Using a Watchdog Processor
,
1985,
ITC.
[5]
Stephen S. Yau,et al.
Concurrent software fault detection
,
1975,
IEEE Transactions on Software Engineering.