In this paper, a novel quantum-dot cellular automata (QCA) adder design is presented that reduces the number of QCA cells compared to previously reported designs. The proposed one-bit QCA adder structure is based on a new algorithm that requires only three majority gates and two inverters for the QCA addition. By connecting n one-bit QCA adders, we can obtain an n-bit carry look-ahead adder with the reduced hardware while retaining the simple clocking scheme and parallel structure of the original carry look-ahead approach. The proposed adder is designed and simulated using the QCA Designer tool for the four-bit adder case. The proposed design requires only about 70% of the hardware compared to previous designs with the same speed and clocking performance.
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