Efficient Power Network Analysis with Modeling of Inductive Effects

SUMMARY In this paper, an efficient method is proposed to accurately analyze large-scale power/ground (P/G) networks, where inductive parasitics are modeled with the partial reluctance. The method is based on frequency-domain circuit analysis and the technique of vector fitting [14], and obtains the time-domain voltage response at given P/G nodes. The frequency-domain circuit equation including partial reluctances is derived, and then solved with the GMRES algorithm with rescaling, preconditioning and recycling techniques. With the merit of sparsified reluctance matrix and iterative solving techniques for the frequency-domain circuit equations, the proposed method is able to handle large-scale P/G networks with complete inductive modeling. Numerical results show that the proposed method is orders of magnitude faster than HSPICE, several times faster than INDUCTWISE [4], and capable of handling the inductive P/G structures with more than 100,000 wire segments.

[1]  Charlie Chung-Ping Chen,et al.  Efficient large-scale power grid analysis based on preconditioned Krylov-subspace iterative methods , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[2]  Wenjian Yu,et al.  Efficient Partial Reluctance Extraction for Large-Scale Regular Power Grid Structures , 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[3]  Wang Zeyi Efficient Extraction of the Frequency-Dependent K Element and Resistance of VLSI Interconnects , 2007 .

[4]  Yici Cai,et al.  Partitioning-based approach to fast on-chip decap budgeting and minimization , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[5]  W. Dai,et al.  Partial reluctance based circuit simulation is efficient and stable , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[6]  Sachin S. Sapatnekar,et al.  Analysis and optimization of structured power/ground networks , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Hiroo Masuda,et al.  Large-scale linear circuit simulation with an inversed inductance matrix , 2004 .

[8]  Rajeev Murgai,et al.  Efficient Power Network Analysis Considering Multidomain Clock Gating , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Zhao Li,et al.  An efficiently preconditioned GMRES method for fast parasitic-sensitive deep-submicron VLSI circuit simulation , 2005, Design, Automation and Test in Europe.

[10]  Lawrence T. Pileggi,et al.  Inductance 101: modeling and extraction , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[11]  Charlie Chung-Ping Chen,et al.  INDUCTWISE: inductance-wise interconnect simulator and extractor , 2002, ICCAD 2002.

[12]  Wenjian Yu,et al.  Fast capacitance extraction of actual 3-D VLSI interconnects using quasi-multiple medium accelerated BEM , 2003 .

[13]  Y. Saad,et al.  GMRES: a generalized minimal residual algorithm for solving nonsymmetric linear systems , 1986 .

[14]  Hao Ji,et al.  How to efficiently capture on-chip inductance effects: introducing a new circuit element K , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[15]  Hiroo Masuda,et al.  Large-scale linear circuit simulation with an inversed inductance matrix , 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

[16]  Wenjian Yu,et al.  An efficient algorithm for 3D reluctance extraction considering high frequency effect , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[17]  Ekanathan Palamadai Natarajan,et al.  KLU{A HIGH PERFORMANCE SPARSE LINEAR SOLVER FOR CIRCUIT SIMULATION PROBLEMS , 2005 .

[18]  Ronald A. Rohrer,et al.  Electronic Circuit and System Simulation Methods , 1994 .

[19]  A. Semlyen,et al.  Rational approximation of frequency domain responses by vector fitting , 1999 .

[20]  Ling Zhang,et al.  Clock Skew Analysis via Vector Fitting in Frequency Domain , 2008, 9th International Symposium on Quality Electronic Design (isqed 2008).

[21]  Jian Wang,et al.  Efficient power network analysis with complete inductive modeling , 2009, 2009 10th International Symposium on Quality Electronic Design.

[22]  Yousef Saad,et al.  Iterative methods for sparse linear systems , 2003 .