Assessment of Proportional–Integral Control Loop Performance for Input Load Disturbance Rejection

This paper studies the performance assessment of proportional−integral (PI) control loops in terms of rejecting input load disturbances. The direct synthesis (DS-d) method for disturbance rejection is adopted to design PI controller parameters. The lower bound of the integrated absolute error (IAE) is established, from closed-loop responses subject to step or other general types of input load disturbance changes. A DS-d IAE-based index is formulated by using the lower bound of the IAE as a performance benchmark. A novel seminonparametric method is proposed to estimate the required parameters for calculating the performance index. Simulation and experimental examples are provided to validate the performance benchmark and to demonstrate the effectiveness of the proposed performance index.

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