Analyzing Worst-Case Delay Performance of IEC 61850-9-2 Process Bus Networks Using Measurements and Network Calculus

In power substation automation systems (SASs) based on IEC 61850, conventional hardwired process connections are being replaced by switched Ethernet. To ensure system reliability and responsiveness, transmission of critical information required by protection and control tasks must satisfy hard delay constraints at all times. Therefore, delay performance conformance should be taken into consideration during the design phase of an SAS project. In this paper, we propose to study the worst-case delay performance of IEC 61850-9-2 process bus networks, which generally carry non-feedforward traffic patterns, through the combination of measurements and network-calculus-based analysis. As an Ethernet switch supports dedicated interconnections between its multiple interfaces, our proposed approach converts a non-feedforward network into feedforward ones by introducing service models for its individual output interfaces instead of modeling it in its entirety with a single service model. To derive practical delay bounds that can be validated against measurement results, our approach not only constructs traffic models based on the idiosyncrasies of process bus network and switched Ethernet, but also establishes service models of networking devices by taking measurements. Results from our case studies of both feedforward and non-feedforward process bus networks show that the proposed combination of network calculus and measurement-based modeling generates accurate delay bounds for Ethernet-based substation communication networks (SCNs). The proposed approach can thus be adopted by designers and architects to analytically evaluate worst-case delay performance at miscellaneous stages of SAS design.