论文信息 - Full temperature single event upset characterization of two microprocessor technologies

Full temperature single event upset characterization of two microprocessor technologies

Data for the Fairchild 9450 I/sup 3/L bipolar microprocessor and the Harris 80C86 CMOS/epi (vintage 1985) microprocessor are presented, showing single-event soft errors for the full mil-spec temperature range of -55 degrees C to 125 degrees C. These data show for the first time that the soft-error cross sections continue to decrease with decreasing temperature at subzero temperatures. The temperature dependence of the two parts, however, is very different. >

[1] B. L. Bhuva,et al. Single Event Upset Dependence on Temperature or an NMOS/Resistive-Load Static RAM , 1986, IEEE Transactions on Nuclear Science.

[2] Donald K. Nichols,et al. A Summary of JPL Single Event Upset Test Data from May 1982, Through January 1984 , 1984, IEEE Transactions on Nuclear Science.

[3] R. Koga,et al. The Effect of Elevated Temperature on Latchup and Bit Errors in CMOS Devices , 1986, IEEE Transactions on Nuclear Science.

[4] D. K. Nichols,et al. IEEE Transactions on Nuclear Science, Vol. NS-34, No. 6, December 1987 Temperature and Epi Thickness Dependence of the Heavy Ion Induced Latchup Threshold for a CMOS/EPI 16K Static RAM , 2007 .