Tuning and simulating a 193-nm resist for 2D applications

For some applications, the usefulness of lithography simulation results depends strongly on the matching between experimental conditions and the simulation input parameters. If this matching is optimized and other sources of error are minimized, then the lithography model can be used to explain printed wafer experimental results. Further, simulation can be useful in predicting the results or in choosing the correct set of experiments. In this paper, PROLITH and ProDATA AutoTune were used to systematically vary simulation input parameters to match measured results on printed wafers used in a 193 nm process. The validity of the simulation parameters was then checked using 3D simulation compared to 2D top-down SEM images. The quality of matching was evaluated using the 1D metrics of average gate CD and Line End Shortening (LES). To ensure the most accurate simulation, a new approach was taken to create a compound mask from GDSII contextual information surrounding an accurate SEM image of the reticle region of interest. Corrections were made to account for all metrology offsets.