A room-temperature silicon single-electron metal–oxide–semiconductor memory with nanoscale floating-gate and ultranarrow channel
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[1] S. Chou,et al. 10 nm Si pillars fabricated using electron‐beam lithography, reactive ion etching, and HF etching , 1993 .
[2] Sandip Tiwari,et al. A silicon nanocrystals based memory , 1996 .
[3] S. Chou,et al. 10 nm electron beam lithography and sub-50 nm overlay using a modified scanning electron microscope , 1993 .
[4] Kazuo Yano,et al. Room-temperature single-electron memory , 1994 .
[5] Roger Fabian W. Pease,et al. Self‐limiting oxidation for fabricating sub‐5 nm silicon nanowires , 1994 .
[6] S. Chou,et al. Single electron and hole quantum dot transistors operating above 110 K , 1995 .
[7] J. R. Davis. Instabilities In Mos Devices , 1981 .