A reduced intermodulation distortion tunable ferroelectric capacitor: architecture and demonstration

A ferroelectric tunable capacitor device architecture is presented that allows for a reduction of intermodulation distortion (IMD), while maintaining high tunability at low bias voltages. The tunable capacitor is fabricated from epitaxial thin-film barium strontium titanate (BST) deposited on a sapphire substrate. The RF portion of the capacitor is a conventional planar gap capacitor with a 10/spl sim/14/spl mu/m gap. However, rather than superimposing the DC bias on the RF gap, a separate bias structure is fabricated within the RF gap. The interdigital bias structure has narrowly-spaced high resistance (2/spl sim/3/spl times/10/sup 4/ /spl Omega///spl square/) indium tin oxide (ITO) electrodes spaced 1/spl sim/2/spl mu/m apart. The high resistivity of the bias electrodes decouples the DC bias from the RF signal path. This bias structure allows high DC fields to be developed with less than 30V applied to tune the material permittivity, but is sufficiently resistive to avoid affecting the Q of the RF capacitor. Because the RF gap is wide, the IMD performance remains good, even at modest tuning voltages. Three different gap capacitors have been fabricated for concept verification: 1) a conventional gap structure (without bias structure), 2) the proposed RF gap capacitor with the DC bias structure, and 3) a narrower conventional RF gap capacitor structure used as an IMD reference. The frequency response of the proposed gap capacitor with the bias structure is characterized and its analysis shows that the highly resistive bias lines are serving as a DC bias path for high tunability, but are not attenuating the RF signal. Two-tone IMD tests show that the IMD performance for the gap capacitor with the bias structure is improved by 6 dB over the conventional reference structure at the same tunability.