Mapping of Topological Quantum Circuits to Physical Hardware

Topological quantum computation is a promising technique to achieve large-scale, error-corrected computation. Quantum hardware is used to create a large, 3-dimensional lattice of entangled qubits while performing computation requires strategic measurement in accordance with a topological circuit specification. The specification is a geometric structure that defines encoded information and fault-tolerant operations. The compilation of a topological circuit is one important aspect of programming a quantum computer, another is the mapping of the topological circuit into the operations performed by the hardware. Each qubit has to be controlled, and measurement results are needed to propagate encoded quantum information from input to output. In this work, we introduce an algorithm for mapping an topological circuit to the operations needed by the physical hardware. We determine the control commands for each qubit in the computer and the relevant measurements that are needed to track information as it moves through the circuit.

[1]  Pedram Khalili Amiri,et al.  Quantum computers , 2003 .

[2]  Robert RAUßENDORF MEASUREMENT-BASED QUANTUM COMPUTATION WITH CLUSTER STATES , 2009 .

[3]  A. Fowler,et al.  High-threshold universal quantum computation on the surface code , 2008, 0803.0272.

[4]  Peter W. Shor,et al.  Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer , 1995, SIAM Rev..

[5]  M. Mosca,et al.  A Meet-in-the-Middle Algorithm for Fast Synthesis of Depth-Optimal Quantum Circuits , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  V.V. Shende,et al.  Synthesis of quantum-logic circuits , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[7]  Igor L. Markov,et al.  Smaller Circuits for Arbitrary n-qubit Diagonal Computations , 2003 .

[8]  Austin G. Fowler,et al.  Topological cluster state quantum computing , 2008, Quantum Inf. Comput..

[9]  A. Fowler,et al.  A bridge to lower overhead quantum computation , 2012, 1209.0510.

[10]  John P. Hayes,et al.  Optimal synthesis of linear reversible circuits , 2008, Quantum Inf. Comput..

[11]  D. James,et al.  Scalable, high-speed measurement-based quantum computer using trapped ions. , 2008, Physical review letters.

[12]  M. Mariantoni,et al.  Surface codes: Towards practical large-scale quantum computation , 2012, 1208.0928.

[13]  Austin G. Fowler,et al.  Surface code with decoherence: An analysis of three superconducting architectures , 2012, 1210.5799.

[14]  Austin G. Fowler,et al.  Quantum circuit optimization by topological compaction in the surface code , 2013, 1304.2807.

[15]  W. Munro,et al.  Architectural design for a topological cluster state quantum computer , 2008, 0808.1782.

[16]  John Kubiatowicz,et al.  Automated generation of layout and control for quantum circuits , 2007, CF '07.

[17]  Amílcar Sernadas,et al.  Quantum Computation and Information , 2006 .

[18]  A. V. Gorshkov,et al.  Scalable architecture for a room temperature solid-state quantum information processor , 2010, Nature Communications.

[19]  C. Macchiavello,et al.  Optimal quantum circuits for general phase estimation. , 2006, Physical review letters.

[20]  A. Kitaev,et al.  Universal quantum computation with ideal Clifford gates and noisy ancillas (14 pages) , 2004, quant-ph/0403025.

[21]  Simon J. Devitt,et al.  Photonic Architecture for Scalable Quantum Information Processing in Diamond , 2013, 1309.4277.

[22]  Kae Nemoto,et al.  Requirements for fault-tolerant factoring on an atom-optics quantum computer , 2012, Nature Communications.

[23]  David Poulin,et al.  Fast decoders for topological quantum codes. , 2009, Physical review letters.

[24]  Archil Avaliani,et al.  Quantum Computers , 2004, ArXiv.

[25]  R. V. Meter,et al.  A Layered Architecture for Quantum Computing Using Quantum Dots , 2010 .

[26]  Todd A. Brun,et al.  Quantum Computing , 2011, Computer Science, The Hardware, Software and Heart of It.

[27]  Dmitri Maslov,et al.  Quantum Circuit Placement , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[28]  Robert Raussendorf,et al.  Topological fault-tolerance in cluster state quantum computation , 2007 .

[29]  R. V. Meter,et al.  DISTRIBUTED QUANTUM COMPUTATION ARCHITECTURE USING SEMICONDUCTOR NANOPHOTONICS , 2009, 0906.2686.

[30]  J. Preskill,et al.  Topological quantum memory , 2001, quant-ph/0110143.

[31]  Michael A. Nielsen,et al.  The Solovay-Kitaev algorithm , 2006, Quantum Inf. Comput..

[32]  Simon J. Devitt,et al.  Synthesis of topological quantum circuits , 2012, 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).