Out-of-loop rate control for video codec hardware/software co-design

Most software-based video encoders perform rate-distortion model analysis to determine the quantizer step size after the motion estimation (ME) step. The Sum of Absolute Differences (SAD) values from the motion estimator are used as the complexity estimates for rate-control model. However, for video encoders on SoC platforms, the calculation of rate-control model is typically done on the Microcontroller Unit (MCU) core while the macroblock encoding loop (ME, transform, quantization, and entropy coding) is done by a VLSI accelerator core. In order to reduce the communication overhead between the MCU and the ASIC accelerator, a rate control algorithm that is executed outside the encoding loop solely by the MCU is very useful. In this paper, an out-of-loop rate control with scene change detection is proposed for video codec for SoC platforms. The experimental results show that this algorithm is very promising for video codec hardware/software co-design.

[1]  Tihao Chiang,et al.  A new rate control scheme using quadratic rate distortion model , 1996, Proceedings of 3rd IEEE International Conference on Image Processing.

[2]  Ja-Ling Wu,et al.  Content-based rate control scheme for very low bit-rate video coding , 1997 .

[3]  Sanjit K. Mitra,et al.  Low-delay rate control for DCT video coding via ?-domain source modeling , 2001, IEEE Trans. Circuits Syst. Video Technol..

[4]  Jordi Ribas-Corbera,et al.  Rate control in DCT video coding for low-delay communications , 1999, IEEE Trans. Circuits Syst. Video Technol..

[5]  Ashish Jagmohan,et al.  MPEG-4 one-pass VBR rate control for digital storage , 2002, Proceedings. International Conference on Image Processing.

[6]  Jordi Ribas-Corbera,et al.  A frame-layer bit allocation for H.263+ , 2000, IEEE Trans. Circuits Syst. Video Technol..