On reducing transitions through data modifications

Since busses take up a significant fraction of chip-area, the bus capacitances are often considerable, and the bus power may account for as much as 40% of the total power consumed on the chip. In applications where the integrity of data is not very important, data may be changed by 3 to 5% without losing too much information. One such application is that of a binary-encoded image, in which case the human eye cannot perceive the small change. However, these small changes can significantly reduce the number of transitions on the data bus and thus the power/energy consumed. We address the following problem: given a sequence of n k-bit data words and an error-tolerance e% (i,e., at most e% of the data bits are permitted to change), select the bits to be modified so that the total number of transitions is minimized. We show that a greedy strategy is not always optimum. We propose a linear-time dynamic programming based algorithm that generates an optimum solution to this problem. The experimental results for randomly generated data with a uniform distribution indicate that by changing e% data bits, the transitions can be reduced, on average, by 4e%.

[1]  Massoud Pedram,et al.  PCUBE: A performance driven placement algorithm for low power designs , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

[2]  Chingwei Yeh,et al.  Technology mapping for low power , 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

[3]  Kaushik Roy,et al.  SYCLOP: synthesis of CMOS logic for low power applications , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[4]  R. Jain,et al.  Low-power DSP circuit design using bit-level pipelined maximally-parallel architectures , 1993 .

[5]  Jason Cong,et al.  Wiresizing with Driver Sizing for Performance and Power Optimization , 1994 .

[6]  Rajeev Murgai,et al.  Data Sequencing for Minimum-transition Transmission , 1997 .

[7]  Rajeev Murgai,et al.  Using complementation and resequencing to minimize transitions , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[8]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[9]  Sharad Malik,et al.  Technology Mapping for Low Power , 1993, 30th ACM/IEEE Design Automation Conference.