Optimization of Structure and Electrical Characteristics for Four-Layer Vertically-Stacked Horizontal Gate-All-Around Si Nanosheets Devices
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Guilei Wang | Xiaobin He | Jun Luo | H. Yin | H. Radamson | Z. Kong | Junjie Li | Qingzhu Zhang | Zhaohao Zhang | Gaobo Xu | J. Xiang | Hong Yang | Jiaxin Yao | Zhenhua Wu | S. Mao | Jie Gu | Renren Xu | Jiajia Tian | Lei Cao