$W$ -Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology
暂无分享,去创建一个
Jri Lee | Yu-Ching Yeh | Pang-Ning Chen | Huaide Wang | Shih-Jou Huang | Jri Lee | Huaide Wang | S. Huang | Pang-Ning Chen | Yu-Ching Yeh
[1] Barrie Gilbert,et al. A precise four-quadrant multiplier with subnanosecond response , 1968, IEEE Solid-State Circuits Newsletter.
[2] Yongxi Qian,et al. A broadband microstrip-to-waveguide transition using quasi-Yagi antenna , 1999, 1999 IEEE MTT-S International Microwave Symposium Digest (Cat. No.99CH36282).
[3] Sorin P. Voinigescu,et al. An 18-Gb/s, Direct QPSK Modulation SiGe BiCMOS Transceiver for Last Mile Links in the 70–80 GHz Band , 2009, IEEE Journal of Solid-State Circuits.
[4] Ran-Hong Yan,et al. A 13.4-GHz CMOS frequency divider , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.
[5] Toshiaki Watanabe,et al. Millimeter-wave microstrip line to waveguide transition fabricated on a single layer dielectric substrate , 2002 .
[6] B. Razavi,et al. A Millimeter-Wave CMOS Heterodyne Receiver With On-Chip LO and Divider , 2008, IEEE Journal of Solid-State Circuits.
[7] Meng-Hsiung Hung,et al. A 60-GHz FSK transceiver with automatically-calibrated demodulator in 90-nm CMOS , 2010, 2010 Symposium on VLSI Circuits.
[8] Christer Svensson,et al. High-speed CMOS circuit technique , 1989 .
[9] Jri Lee,et al. A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition , 2009, IEEE Journal of Solid-State Circuits.
[10] C. Chien,et al. A single-chip 12.7 Mchips/s digital IF BPSK direct sequence spread-spectrum transceiver in 1.2 μm CMOS , 1994, IEEE J. Solid State Circuits.
[11] Jri Lee,et al. A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology , 2008, IEEE Journal of Solid-State Circuits.
[12] S. Gambini,et al. A 90 nm CMOS Low-Power 60 GHz Transceiver With Integrated Baseband Circuitry , 2009, IEEE Journal of Solid-State Circuits.
[13] Jri Lee,et al. A Fully-Integrated 77-GHz FMCW Radar Transceiver in 65-nm CMOS Technology , 2010, IEEE Journal of Solid-State Circuits.
[14] L. Q. Bui,et al. Waveguide-to-microstrip transitions for millimeter-wave applications , 1988, 1988., IEEE MTT-S International Microwave Symposium Digest.
[15] J. Lee,et al. A 40 Gb/s clock and data recovery circuit in 0.18 /spl mu/m CMOS technology , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..
[16] Xiaojun Yuan,et al. A low power 60GHz OOK transceiver system in 90nm CMOS with innovative on-chip AMC antenna , 2009, 2009 IEEE Asian Solid-State Circuits Conference.
[17] Jri Lee,et al. A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System With OOK Modulation and On-Board Antenna Assembly , 2009, IEEE Journal of Solid-State Circuits.
[18] Jri Lee. A 20-Gb/s Adaptive Equalizer in 0.13-$muhbox m$CMOS Technology , 2006, IEEE Journal of Solid-State Circuits.
[19] Hiroyuki Takahashi,et al. 10-Gbit/s QPSK modulator and demodulator for a 120-GHz-band wireless link , 2010, 2010 IEEE MTT-S International Microwave Symposium.
[20] John P. Costas,et al. Synchronous Communications , 1956, Proceedings of the IRE.
[21] A. Tomkins,et al. A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link , 2009, IEEE Journal of Solid-State Circuits.
[22] B. Heydari,et al. A 60-GHz 90-nm CMOS cascode amplifier with interstage matching , 2007, 2007 European Microwave Integrated Circuit Conference.
[23] W. Menzel,et al. Microstrip to waveguide transition compatible with MM-wave integrated circuits , 1994 .