A parallel algorithm for state assignment of finite state machines
暂无分享,去创建一个
[1] John A. Chandy,et al. A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application , 1994, Proceedings of Supercomputing '94.
[2] P. R. Stephan,et al. SIS : A System for Sequential Circuit Synthesis , 1992 .
[3] Prithviraj Banerjee,et al. A Parallel Algorithm for State Assignment of Finite State Machines , 1998, IEEE Trans. Computers.
[4] Prithviraj Banerjee. Parallel algorithms for VLSI computer-aided design , 1994 .
[5] Srinivas Devadas,et al. Optimum and heuristic algorithms for finite state machine decomposition and partitioning , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[6] Srinivas Devadas,et al. Implicit state transition graphs: applications to sequential logic synthesis and test , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[7] Alberto L. Sangiovanni-Vincentelli,et al. MUSTANG: state assignment of finite state machines targeting multilevel logic implementations , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[8] Tiziano Villa,et al. NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations , 1989, 26th ACM/IEEE Design Automation Conference.
[9] Jonathan Rose,et al. Parallel standard cell placement algorithms with quality equivalent to simulated annealing , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[10] Prithviraj Banerjee,et al. Parallel algorithms for VLSI circuit extraction , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[11] Prithviraj Banerjee,et al. Simulated annealing based parallel state assignment of finite state machines , 1997, Proceedings Tenth International Conference on VLSI Design.
[12] John A. Chandy,et al. Parallel algorithms for logic synthesis using the MIS approach , 1995, Proceedings of 9th International Parallel Processing Symposium.