AMBER Sched: An Analytical Model Based Resource Scheduler for Programmable Routers

The growth of the Internet in the last years has been pushed by increasing requirements in terms of capacity, security and reliability. Moreover, improvements in multimedia applications need mechanisms and architectures to accomplish quality of service (QoS) and differentiated services. Technology development has shown that the evolution of processing power cannot cope with the link capacity growth. Therefore a link capacity scheduler is no longer sufficient to assure efficient service differentiation to end-users, but a proper computing power allocation for packet processing must be adopted. In this paper a processing scheduling scheme for Intelreg IXP2XXX Network Processors is proposed. A model of the architecture is defined and an ad-hoc simulator is developed to help the comprehension of the system and the re-design of the application. Finally experimental results show the performance of the proposed algorithm.

[1]  J. Williams Architectures for network processing , 2001, 2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517).

[2]  Douglas Comer Network Systems Design Using Network Processors: Intel 2XXX Version , 2005 .

[3]  Di Wu,et al.  Component based performance prediction for network processor based system , 2005, Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05).

[4]  Laxmi N. Bhuyan,et al.  On fair scheduling in heterogeneous link aggregated services , 2005, Proceedings. 14th International Conference on Computer Communications and Networks, 2005. ICCCN 2005..

[5]  Patrick Crowley,et al.  Network Processor Design: Issues and Practices , 2002 .

[6]  M. Laor,et al.  The effect of packet reordering in a backbone link on application throughput , 2002, IEEE Netw..

[7]  Tilman Wolf,et al.  Predictive scheduling of network processors , 2003, Comput. Networks.

[8]  Banu Ozden,et al.  Fair queuing for aggregated multiple links , 2001, SIGCOMM 2001.

[9]  Douglas Comer,et al.  Network Systems Design Using Network Processors , 2003 .

[10]  Andrew Odlyzko,et al.  Internet traffic growth: sources and implications , 2003, SPIE ITCom.

[11]  Anant Agarwal,et al.  Performance Tradeoffs in Multithreaded Processors , 1992, IEEE Trans. Parallel Distributed Syst..

[12]  Sanjay Jha,et al.  Implementation and performance analysis of a packet scheduler on a programmable network processor , 2005, The IEEE Conference on Local Computer Networks 30th Anniversary (LCN'05)l.