A low phase-noise CMOS VCO with harmonic tuned LC tank

This paper presents a phase-noise reduction technique for voltage-controlled oscillators (VCOs) using a harmonic tuned (HT) LC tank. The phase-noise suppression is achieved through almost rectangular-shaped voltage at the switching differential cell, which effectively maximizes the slope of the switching cell output voltage at a zero crossing point. In addition, the proposed technique also suppresses the down-conversion of the noise around the second harmonic frequency by the second harmonic short of the tank. One second HT VCO and two third HT VCOs are designed and implemented to evaluate the concept using a 0.35- and 0.13-/spl mu/m CMOS process. The figure-of-merit (FOM) of the second HT VCO, third HT VCO1, and third HT VCO2 are -180.7, -183.7, and -189.5, respectively. The best FOM performance of the VCO has phase noises of -100.4, -132.0, and -140.8dBc/Hz at 100-kHz, 1-MHz, and 3-MHz offset frequencies at the 2-GHz carrier, respectively. This VCO consumes 3.29 mA from a 1.8-V supply with the silicon area of 500 /spl mu/m/spl times/750 /spl mu/m.

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