A 16-Bit Barrel-Shifter Implemented in Data-Driven Dynamic Logic ($D ^3 L$)

Data-driven dynamic logic (D3L) uses local data instead of a global clock to maintain correct precharge and evaluation phases. Eliminating the clock from dynamic gates yields less power consumption and faster gate operation. Two 16-bit barrel shifters are implemented in a 5-V 0.6-mum CMOS technology: one in normal Domino logic and the other in our proposed D3L. Separate power leads are used on the chip to measure power consumption of separate sections. Post-layout simulations show that, depending on input patterns, a D3L shifter consumes 8% to 62% less power and is 29% faster than the Domino circuit. In addition, it provides an additional 9% area advantage over its Domino rival. Experimental measurements confirm post-layout simulation results, and prove the feasibility of the proposed logic

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