Compiler-Directed Fine Grain Power Gating for Leakage Power Reduction in Microprocessor Functional Units
暂无分享,去创建一个
[1] Srinivas Katkoori,et al. A Compiler Based Leakage Reduction Technique by Power-Gating Functional Units in Embedded Microprocessors , 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).
[2] Y. N. Srikant,et al. Compiler-assisted leakage energy optimization for clustered VLIW architectures , 2006, EMSOFT '06.
[3] Pradip Bose,et al. Microarchitectural techniques for power gating of execution units , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).
[4] Jenq Kuen Lee,et al. Compilers for leakage power reduction , 2006, TODE.
[5] Margaret Martonosi,et al. Cache decay: exploiting generational behavior to reduce cache leakage power , 2001, ISCA 2001.
[6] John L. Henning. SPEC CPU2000: Measuring CPU Performance in the New Millennium , 2000, Computer.
[7] Jeanine Cook,et al. Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization , 2007, 2007 IEEE International Performance, Computing, and Communications Conference.
[8] Trevor Mudge,et al. MiBench: A free, commercially representative embedded benchmark suite , 2001 .
[9] Managing static leakage energy in microprocessor functional units , 2002, MICRO 35.
[10] Santosh Pande,et al. Optimizing Static Power Dissipation by Functional Units in Superscalar Processors , 2002, CC.
[11] David Blaauw,et al. Drowsy caches: simple techniques for reducing leakage power , 2002, ISCA.
[12] Hiroshi Nakamura,et al. A fine-grain dynamic sleep control scheme in MIPS R3000 , 2008, 2008 IEEE International Conference on Computer Design.
[13] Todd M. Austin,et al. SimpleScalar: An Infrastructure for Computer System Modeling , 2002, Computer.
[14] Alfred V. Aho,et al. Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.
[15] Gurindar S. Sohi,et al. A static power model for architects , 2000, MICRO 33.