On the Area Required by VLSI Circuits

A technique is developed and used to derive lower bounds on the area required by a VLSI circuit by taking into account the amount of information that has to be memorized in the course of the computation. Simple arguments show, in particular, that any circuit performing operations such as cyclic shift and binary multiplication requires an area at least proportional to its output size. By extending the technique, it is also possible to obtain general tradeoffs between the area, the time, and the period (a measure of the pipeline rate) of a circuit performing operations like binary addition. The existence of VLSI designs for these operations shows that all the lower bounds are optimal up to some constant factor.

[1]  Lynn Conway,et al.  Introduction to VLSI systems , 1978 .

[2]  Andrew Chi-Chih Yao,et al.  The entropic limitations on VLSI computations(Extended Abstract) , 1981, STOC '81.

[3]  Harold Abelson,et al.  Information transfer and area-time tradeoffs for VLSI multiplication , 1980, CACM.

[4]  C. Thomborson,et al.  Area-time complexity for VLSI , 1979, STOC.

[5]  H. T. Kung,et al.  The chip complexity of binary arithmetic , 1980, STOC '80.

[6]  Robert B. Johnson,et al.  The Complexity of a VLSI Adder , 1980, Inf. Process. Lett..

[7]  John E. Savage,et al.  Area-Time Tradeoffs for Matrix Multiplication and Related Problems in VLSI Models , 1981, J. Comput. Syst. Sci..

[8]  H. T. Kung,et al.  I/O complexity: The red-blue pebble game , 1981, STOC '81.

[9]  Jean Vuillemin,et al.  A combinatorial limit to the computing power of V.L.S.I. circuits , 1980, 21st Annual Symposium on Foundations of Computer Science (sfcs 1980).

[10]  Jean Vuillemin,et al.  A Combinatorial Limit to the Computing Power of VLSI Circuits , 1983, IEEE Transactions on Computers.

[11]  Bernard Chazelle,et al.  Census functions: An approach to VLSI upper bounds , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).