Impact of single charge trapping in nano-MOSFETs-electrostatics versus transport effects

In this paper, using Monte Carlo (MC) simulations featuring ab initio Coulomb scattering, we study the impact of Coulomb scattering from a single trapped electron on the magnitude of the corresponding drain-current reduction in a series of well scaled n-channel nano-MOSFETs. Through a careful comparison with drift-diffusion (DD) simulations that only capture the electrostatic effects associated with the trapped charge, we were able to demonstrate the specific contribution of the scattering. The simulations are performed at low drain bias for MOSFETs with channel lengths of 30, 20, and 10 nm, respectively. Compared to the DD results, the MC simulations show significant additional reduction in drain current associated with the scattering from the trapped electron. The scattering related percentage reduction in the current increases with the increase of the gate voltage toward strong inversion conditions. The velocity distributions in the presence of the trapped charge at various gate conditions are carefully analyzed in order to explain the magnitude of the observed effect.

[1]  Karl Hess,et al.  Simulation of Si-SiO/sub 2/ defect generation in CMOS chips: from atomistic structure to chip failure rates , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[2]  R W Hockney,et al.  Computer Simulation Using Particles , 1966 .

[3]  R. Howard,et al.  Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency ( 1 f ?) Noise , 1984 .

[4]  Clinton R. Arokianathan,et al.  Mesh-based particle simulation of sub-0.1 micron FETs , 1998 .

[5]  M. Dutoit,et al.  Random telegraph signals in deep submicron n-MOSFET's , 1994 .

[6]  Toshiro Hiramoto,et al.  Impact of the device scaling on the low-frequency noise in n-MOSFETs , 2000, Applied Physics A.

[7]  P.K. Ko,et al.  Random telegraph noise of deep-submicrometer MOSFETs , 1990, IEEE Electron Device Letters.

[8]  Umberto Ravaioli,et al.  Integration of a particle-particle-particle-mesh algorithm with the ensemble Monte Carlo method for the simulation of ultra-small semiconductor devices , 2000 .

[9]  E. Worley,et al.  The gate bias and geometry dependence of random telegraph signal amplitudes [MOSFET] , 1997, IEEE Electron Device Letters.

[10]  Numerical carrier heating when implementing P3M to study small volume variations , 2004 .

[11]  Effect of single-electron interface trapping in decanano MOSFETs: A 3D atomistic simulation study , 2000 .

[12]  P. Dollfus,et al.  Effect of discrete impurities on electron transport in ultrashort MOSFET using 3D MC simulation , 2003, IEEE Transactions on Electron Devices.

[13]  Dragica Vasileska,et al.  Ultrasmall MOSFETs: the importance of the full Coulomb interaction on device characteristics , 2000 .

[14]  M. J. Kirton,et al.  Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/ƒ) noise , 1989 .

[15]  Effect of single-electron interface trapping in decanano MOSFETs : A 3 D atomistic simulation study , 2000 .

[16]  D. Vasileska,et al.  A novel approach for introducing the electron-electron and electron-impurity interactions in particle-based simulations , 1999, IEEE Electron Device Letters.

[17]  Andrew R. Brown,et al.  RTS amplitudes in decananometer MOSFETs: 3-D simulation study , 2003 .

[18]  Eddy Simoen,et al.  Tunneling 1/ f ? noise in 5 nm HfO 2/2.1 nm SiO 2 gate stack n-MOSFETs , 2005 .

[19]  J. W. Park,et al.  DRAM variable retention time , 1992, 1992 International Technical Digest on Electron Devices Meeting.

[20]  Wolfgang H. Krautschneider,et al.  Observation and modeling of random telegraph signals in the gate and drain currents of tunneling metal–oxide–semiconductor field-effect transistors , 2001 .