Investigation of multi-layered-gate electrode workfunction engineered recessed channel (MLGEWE-RC) sub-50 nm MOSFET: A novel design

In this paper, a two-dimensional (2D) analytical sub-threshold model for a novel sub-50 nm multi-layered-gate electrode workfunction engineered recessed channel (MLGEWE-RC) MOSFET is presented and investigated using ATLAS device simulator to counteract the large gate leakage current and increased standby power consumption that arise due to continued scaling of SiO2-based gate dielectrics. The model includes the evaluation of surface potential, electric field along the channel, threshold voltage, drain-induced barrier lowering, sub-threshold drain current and sub-threshold swing. Results reveal that MLGEWE-RC MOSFET design exhibits significant enhancement in terms of improved hot carrier effect immunity, carrier transport efficiency and reduced short channel effects proving its efficacy for high-speed integration circuits and analog design. Copyright © 2008 John Wiley & Sons, Ltd.

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